Red Digital Cinema, Thousand Oaks, California — November 2014–present

Senior Principal, Digital Design

Panavision, Woodland Hills, California — January 2011–October 2014

Senior Engineer — Digital Design

• Design and implementation of 8K (7680x3240) 60fps CMOS sensor correction logic.
  • Xilinx Virtex-6 platform.
  • Line fixed-pattern noise (LFPN) correction.
  • Flat-field pixel offset and response calibration and correction.
  • Adjacent-pixel defect replacement scheme with dynamic calibration.
• Demosaic logic.
• Programmable 11x11 filter resampling/decimation logic.
• Custom Xilinx GTX interface supporting 3.9Gbps per channel.
• Multi-channel DDR3 512 bit interface to Virtex-6.
• UHD 4:4:4 output to HDMI 1.4a equipment.
• SMPTE 12M Linear Timecode detection, generation.
• Extensive microcontroller programming: Atmel, PowerPC, Microblaze.
• High bandwidth/low latency UHD video compression algorithm evaluation.

AltaSens, Westlake Village, California — January 2008–January 2011

Senior Scientist

• HD video processing pipeline development: FPGA (Xilinx) Verilog for defect pixel correction, demosaic (Bayer pattern interpolation), black level subtract, color correction, HSL modification, gamma correction, DVI formatting. C code for AWB, AE, etc.
• Sensor yield analysis: Verilog and embedded C for near-realtime noise, defect, etc data acquisition.
• CMOS DSLR, HD and Digital Cinema sensor: fully automated randomized RTL and gate-level algorithm verification.

Micron Technology, Pasadena, California — August 2006–December 2007

Team Lead — Applications Engineering

• Managed Applications Engineering Team charged with supporting Micron's industry-leading CMOS imaging products.
• Researched and documented detailed requirements for CMOS image sensor and companion chip products.
• Authored, revised and reviewed Datasheets, Die Datasheets, Technical Notes and other end-user documentation for a wide range of CMOS imager and SoC products.
• Debugged hardware, Verilog and SoC firmware to ensure timely deployment of sensor products in high volume end-user applications.

ESS Technology (formerly Sierra Imaging, Conexant Systems, then Pictos Technologies), Scotts Valley, California; Melbourne, Australia — August 1996–August 2006

Digital Still Camera Firmware Development

• Designed, implemented and documented digital camera control firmware, featuring hardware independent/dependent porting layer, lightweight graphics library for UI developers, and Unicode and TrueType based localization scheme; shipped in numerous commercially available consumer digital cameras. Implementation featured instant boot time, small EPROM footprint, low power consumption, and easily maintained code base.
• Wrote hardware drivers for lens stepper motors; non-volatile memory devices; NTSC, PAL and LCD display devices; CDS chips; and assorted other embedded device peripherals.
• Designed and implemented high-speed autofocus algorithm.
• Implemented I2C timing compliant host side API.
• Ported open source MP3 codec to embedded environment and optimized implementation to overcome showstopper CPU and memory bandwidth limitations.
• Designed, documented, packaged and maintained digital camera software development kit for external developers. Conducted training sessions in Melbourne and Southern California for external developers based in Japan, Taiwan, USA and China. Provided followup technical support to all external developers.
• Provided ongoing firmware architecture development guidance to in-house technical team members.
• Established and maintained build environment for dual-host firmware development (Solaris and Windows).

SoC and Image Processing ASIC Development

• Established extensive ASIC development simulation test environment seamlessly integrated with firmware development.
• Created chip verification scheme with flexible approaches to creating input stimuli and validating output signals. This resulted in the first turn of all chips being stable and correct. The first turns of all chips were used in commercial camera production.
• Designed, documented and authored a completely new digital image processing stage within an existing CMOS image processor.
• Researched and prepared functional specification for the next generation of image processors for CMOS imagers.
• Provided firmware-side code support and tools from RTL through synthesis, gate level verification, tape out then manufacture.
• Acted as technical liaison between ASIC and Firmware groups ensuring rapid transition from ASIC development to product deployment.
• Authored table driven assembler for numerous custom DSP and processing blocks within each chip; used from RTL creation through to final firmware.

DSC Hardware

• Designed schematics and wrote driver and user interface code for the Micronas MAS3509F MP3 decoder integrated into a digital camera.
• Designed prototype schematics and wrote driver for low cost stereo and mono audio output implementations using PWM signals as audio amplifier inputs.
• Prototyped microphone, pre-amp and VCA circuit and driver code used for audio input in the HP Photosmart 720 digital camera.
• Substantial experience debugging prototype hardware using alpha-level firmware.
• Helped establish digital camera production lines on site in Japan and Taiwan in conjunction with hardware engineers.
• Provided remote technical support for production teams on-site in China.

Anyware Fast, San Jose, California — May 1995–August 1996

• Wrote SCO compatible X server drivers and configuration files for PCI graphics adapters using Cirrus GD5436 and GD5446 video chips.
• Ported 3D video game from 3DO to Sony Playstation (MIPS R3000) using Sony's Playstation 1 development platform.
• Ported Sun's XIL imaging library for C++ and C to HP/UX.

Sun Microsystems, Mountain View, California — February 1994–April 1995

• Coordinated Intel x86 issues for XGL (SunSoft's 3D graphics library).
• Integrated and qualified third-party developed 3D graphics drivers for XGL.
• Compiled performance and quality numbers for XGL on x86 platforms.
• Device driver work for the Sun CG6 3D graphics adapter.

The Santa Cruz Operation, Santa Cruz, California — July 1989–February 1994

• Implemented high-performance graphics driver support for video hardware based on S3 86C801, 86C805, 86C928, Cirrus Logic GD5426, GD5428, Weitek P9000, IBM 8514/A, ATI Mach8, Mach32, Texas Instruments TMS34010, TMS34020 ASICs.
• Established and maintained technical channels with video hardware IHVs of all major mass-market video hardware.

HCR (Human Computing Resources), Toronto, Canada — November 1987–May 1989

• Ported the source base for Oracle's V5.1 RDBMS, V6.0 RDBMS and many associated utilities to Control Data Corporation Cyber 180 64 bit architecture.

Skills

Languages: Verilog, C/C++, VHDL, bash/ksh/sh scripting
Tools: git, ModelSim, OrCAD, Subversion, CVS, GNU gcc
Operating Systems: Fedora, Debian, Ubuntu, Solaris, Cygwin/Windows, SCO Unix
Other: Xilinx FPGA Ultrascale+, Ultrascale, Kintex-7, Virtex-6, Virtex-5, Vivado, ISE, XPS

Education

BSc (Hons) Computer Science, La Trobe University, Melbourne, Australia, 1987.

Citizenship

Australia, United States