Johnson & Johnson (formerly Auris Health), Westlake Village, California — March 2020–

Principal Engineer, Digital Design

• Imaging solutions for robotic surgery.

Red Digital Cinema, Thousand Oaks, California — November 2014–March 2020

Senior Principal, Digital Design

• High bandwidth image processing for Xilinx Kintex, Virtex and Zynq Ultrascale and Ultrascale+ based cinema, broadcast television, and augmented reality platforms.

Panavision, Woodland Hills, California — January 2011–October 2014

Senior Engineer — Digital Design

• Design and implementation of 8K (7680x3240) 60fps CMOS sensor correction logic.
  • Xilinx Virtex-6 platform.
  • Line fixed-pattern noise (LFPN) correction.
  • Flat-field pixel offset and response calibration and correction.
  • Pixel defect replacement with dynamic calibration.
• Demosaic.
• Programmable 11x11 filter resampling/decimation logic.
• Custom Xilinx GTX interface supporting 3.9Gbps per channel.
• Multi-channel DDR3 512 bit interface to Virtex-6.
• UHD 4:4:4 output to HDMI 1.4a equipment.
• SMPTE 12M Linear Timecode detection, generation.
• Microcontroller programming: Atmel, PowerPC, Microblaze.

AltaSens, Westlake Village, California — January 2008–January 2011

Senior Scientist

• HD video processing pipeline development: FPGA (Xilinx) Verilog for defect pixel correction, demosaic (Bayer pattern interpolation), black level subtract, color correction, HSL modification, gamma correction, DVI formatting. C code for AWB, AE, etc.
• Sensor yield analysis: Verilog and embedded C for near-realtime noise, defect, etc data acquisition.
• CMOS DSLR, HD and Digital Cinema sensor: fully automated randomized RTL and gate-level algorithm verification.

Micron Technology, Pasadena, California — August 2006–December 2007

Team Lead — Applications Engineering

• Managed Applications Engineering team charged with supporting Micron's CMOS imaging products.
• Researched and documented requirements for CMOS image sensor and companion chip products.
• Authored, revised and reviewed datasheets, die datasheets, technical notes and other end-user documentation for CMOS imager and SoC products.

ESS Technology (formerly Sierra Imaging, Conexant Systems, then Pictos Technologies), Scotts Valley, California; Melbourne, Australia — August 1996–August 2006

SoC and Image Processing ASIC Development

• Established ASIC development simulation test environment integrated with firmware development environment.
• Image processing ASIC verification for Raptor, Raptor II, and Raptor III products.
• Authored table driven assembler for custom DSP and processing blocks within each ASIC.

Digital Still Camera Firmware Development

• Designed, implemented and documented digital camera control firmware.
• Hardware drivers for lens stepper motors; non-volatile memory devices; NTSC, PAL and LCD display devices; CDS chips; etc.
• Designed and implemented high-speed autofocus algorithm.
• Ported open source MP3 codec to embedded environment.

Anyware Fast, San Jose, California — May 1995–August 1996

• SCO compatible X Server drivers and configuration files for PCI graphics adapters using Cirrus GD5436 and GD5446 video chips.
• Ported 3D video game from 3DO to Sony Playstation (MIPS R3000) using Sony's Playstation 1 development platform.
• Ported Sun's XIL imaging library for C++ and C to HP/UX.

Sun Microsystems, Mountain View, California — February 1994–April 1995

• Coordinated Intel x86 issues for XGL (SunSoft's 3D graphics library).
• Integrated and qualified third-party developed 3D graphics drivers for XGL.
• Compiled performance and quality numbers for XGL on x86 platforms.
• Device driver work for the Sun CG6 3D graphics adapter.

The Santa Cruz Operation, Santa Cruz, California — July 1989–February 1994

• X Server graphics drivers for video hardware based on S3 86C801, 86C805, 86C928, Cirrus Logic GD5426, GD5428, Weitek P9000, IBM 8514/A, ATI Mach8 and Mach32, Texas Instruments TMS34010, and TMS34020.

HCR (Human Computing Resources), Toronto, Canada — November 1987–May 1989

• Ported Oracle's V5.1 RDBMS, V6.0 RDBMS and associated utilities from 32 bit Unix environment to Control Data Corporation Cyber 180 supercomputers.

Skills

Languages: Verilog, C, bash scripting
Tools: Vivado, Chipscope, git, Emacs Verilog-mode, Quartus, Signal Tap, Lattice Diamond, Lattice Reveal
Operating Systems: Fedora, Ubuntu, CentOS, Cygwin/Windows
Other: Xilinx Ultrascale+, Ultrascale, Kintex-7, AXI4, SMPTE ST 2082, Altera/Intel Arria V

Education

BSc (Hons) Computer Science, La Trobe University, Melbourne, Australia, 1988.

Citizenship

Australia, United States